1. Field of the Invention
The present invention relates to an orthogonal frequency division multiplexing (OFDM) receiver and a method thereof, and more particularly, to an OFDM receiver for interlocking FFT window position recovery with sampling clock control for controlling an analog-to-digital converter, and a method thereof.
2. Description of the Related Art
Generally, time synchronization and frequency synchronization must be accurately performed to allow a receiver to recover an OFDM signal for European ten digital broadcasts transmitted from a transmitter. Time synchronization consists of FFT window position recovery for accurate parallel processing of signals, and was sampling clock recovery for controlling a sampling clock of an analog-to-digital converter (ADC) for sampling a signal having a maximum signal-to-noise ratio (SNR) among received signals. Frequency synchronization means that the radio frequency (RF) oscillation frequency of a receiver is synchronized with the oscillation frequency of a transmitter.
FIG. 1 is a block diagram of a portion for carrying out FFT window position recovery and sampling clock control in a general OFDM system receiver.
When the number of bins of FFT is N, the symbol of an OFDM signal is comprised of a useful data interval having N useful data samples being the outputs of an inverse fast Fourier transform (IFFT), and a guard interval having G sample lengths to be inserted between symbols to prevent inter-symbol interference. The guard interval copies the end portion of the useful data interval. A transmitter (not shown) sequentially transmits a symbol consisting of G+N samples being the sum of N complex values and G complex values output by the IFFT.
An i-th symbol comprised of complex values output by an FFT is expressed by the following Equation 1:                               s          l                =                                            ∑                              n                =                                  -                  G                                                            N                -                1                                      ⁢                                                   ⁢                          x                              l                ,                n                                              =                                                    ∑                                  n                  =                                      -                    G                                                                    -                  1                                            ⁢                                                           ⁢                                                ∑                                      k                    =                    0                                                        N                    -                    1                                                  ⁢                                                                   ⁢                                                      X                                          l                      ,                                              k                                                  ⅇ                                                      j                            ⁢                                                                                                                   ⁢                            2                            ⁢                                                                                          n                                ⁡                                                                  (                                                                      N                                    +                                    n                                                                    )                                                                                            /                                                                                                                                                            ⁢                  N                                                      +                                          ∑                                  n                  =                  0                                                  N                  -                  1                                            ⁢                                                ∑                                      k                    =                    0                                                        N                    -                    1                                                  ⁢                                  X                                      l                    ,                                          k                                              ⅇ                                                  j2                          ⁢                                                                                                           ⁢                                                      nkn                            /                            N                                                                                                                                                                                                      (        1        )            wherein l is a symbol number, k is a carrier index (number), N is the number of useful data samples, and n represents sampling time. The first term of the second expression of Equation 1 represents a guard interval, and the second term represents a useful data interval.
As shown in FIG. 1, an ADC 110 samples a received OFDM signal. An FFT window 120 is controlled by an FFT window controller 180 to recover an FFT window position, and removes the guard interval of the first term of Equation 1 and then sequentially transmits the second term to the FFT 130. A phase difference calculator 150 calculates a phase difference between two pilots extracted by a pilot extractor 140 for one symbol. An FFT window offset detector 160 detects the position of the FFT window by the phase difference output by the phase difference calculator 150. The FFT window controller 180 controls the position of the FFT window by the FFT window offset. When FFT window position recovery is not carried out well, the received signal cannot be accurately recovered since sampling clock control is also not carried out well. Hence, the sampling clock control starts after FFT window position recovery by the FFT window controller 180 is completed. In other words, the phase difference calculator 150 calculates phase differences between pilots extracted between current and previous symbols by the pilot extractor 140 after the FFT window position recovery is completed. A sampling clock offset detector 170 detects sampling offsets using the phase difference output by the phase difference calculator 150. A phase-locked loop (PLL) 190 controls the sampling clocks of the ADC 110 according to input sampling clock offsets. If the sampling clocks are not controlled, the receiver is not sampled into a total of (N+G) samples for one symbol but sampled into (N+G+1) or (N+G−1) samples because of a sampling clock difference between the receiver and transmitter, resulting in a sample stuff-rob phenomenon. As a consequence, a next symbol start point is preceded or delayed by one sample. Therefore, the apparatus of FIG. 1 controls sampling clock errors after accurate FFT window position recovery is carried out, and thus the sample stuff-rob phenomenon is generated while FFT position recovery is performed.